Is it possible to change the PCIe link Speed and Width in hailo kernel driver?

General
1

I want to change the PCIe link Speed and Width in hailo kernel driver in order to want to know the effect of PCIe BW on the performance.
In my linux PC, the upper PCIe bridge supports 8GT/s Speed x 4 Width.
But I want to reduce speed and width as I want in linux kernel driver or something else.
PS. When I checked the linux hailo kernel driver, it seems to be no source code to negotiate with PCIe bridge.

2

Hey @cgfs10000,

Welcome to the Hailo Community!

Currently, we do not support these operations. The Hailo driver is designed to utilize the full PCIe bandwidth provided. However, you can change the PCIe generation to reduce the speed and observe the effect on performance.

1 Like
3

Hello,

I hope my experience will be helpful for you.
Basically, PCIe Gen speed can be set by BIOS if you’re using Intel/AMD x86 CPU. (Embedded CPU not possible)
If your slot is x4 Lane, you can find PCIe setting easily in PCH or PCIe configuration option.
If x4 is from PEG, you should go into PEG(Graphic option).
After find setting, you can set the speed to Gen1/2/3/4/Auto…

Based on my experience, Gen2 can not decrease the AI performance with x4 Lane.
but Gen1 or x1 Lane decrease the performance clearly.

thanks

2 Likes
4

Thanks for reply, @omria.
Do you mean that PCIe gen can be changed in Hailo 8 device side?
If it is right, would you guide how to change PCie gen?

5

Welcome to the Hailo Community!

No, we do not support this on the Hailo-8 side. The Hailo-8 will negotiate this automatically with the host. However some systems e.g. Raspberry Pi 5 allow you to do that on the host side.

1 Like