Hello, while I was reviewing the data manual of Hailo8, I came across the following picture. I’m puzzled as to why the Hailo8 chip seems like a complete SOC, but the applications I have seen so far all require an external processor, such as the Raspberry Pi, CPU, etc. So I have the following two questions.
1:Why is Hailo a complete SOC, but it still needs to be connected to another processor through methods such as PCIE? And it seems that all the programs are running on external processors (for example, external processors need to download software like Hailo RT). If this is the case, then what are the functions of the Cortex M4 core on the Hailo 8 and other peripherals such as I2C, USB, and ETH?
2: As shown in the figure, the NN Core is considered to be the core of Hailo 8. However, the documentation does not provide a very detailed introduction to this NN Core. I would like to know which architectures (such as pulse array) this NN Core uses to accelerate the operation of neural networks.
The Hailo-8 isn’t designed to work as a standalone general-purpose processor. It’s built specifically as a high-efficiency neural network accelerator.
Here’s how it works:
The Cortex-M4 core isn’t meant for running your applications. It mainly handles internal tasks like configuration, device management, and some basic control functions needed for coordination.
The PCIe interface is where the real action happens - it’s how data flows in and out of the Hailo-8’s NN core.
While the Hailo-8 does have I2C, SPI, and GPIO interfaces, these are mainly for auxiliary functions or board-level integration - things like signaling or basic control, not full system operation.
So essentially, the Hailo-8 is an accelerator that needs external processors to handle the application-level software.
For your second question about the specifics of how we accelerate neural networks - while you’re welcome to check out all the documentation we have available, the actual acceleration methods are our intellectual property, so we can’t share those details.
