Porting the Hailo PCIe Linux Kernel Driver to Rust 🦀 (Early Stage)

Hey Hailo Community! :waving_hand:

First things first: I use AI mostly to help transform my thoughts into a readable format. I am not really the best with these kinds of social posts, so bear with me! :sweat_smile:

I’d like to introduce a new community project I’ve been working on: A completely Rust-based out-of-tree Linux kernel driver for the Hailo PCIe AI accelerator, built on top of the official Rust-for-Linux (RfL) infrastructure.

Currently, the project is still in its absolute infancy, but we just hit a massive first milestone on the Raspberry Pi 5: The module compiles, loads, and successfully identifies the Hailo-10H / Hailo-15L and Hailo-Mars chip on the PCI bus! :tada:

Since this is a massive undertaking, I want to open this up to the community early on. Here is what the roadmap and structure look like:

:bullseye: Goal & Versioning

The goal is to reach a stable Release Candidate (RC) as version 1.0.0-rpi-kernel-y.

We are strictly targeting the current/latest kernel versions – meaning there will be no legacy kernel support. Moving forward, the first official RC will most likely target a Linux v7.x kernel, aligning with the upstream Rust-for-Linux progression.

:herb: Branching Strategy

Right now, everything happens on the main branch. Once we hit our RC phase, we will switch to a multi-versioned branching strategy (similar to how the raspberrypi/linux repository handles their branches) to keep track of different kernel versions cleanly.

:handshake: Call for Contributors (Help Wanted!)

I would absolutely love to see this grow into a collaborative community effort. Whether you are a Rust pro, an ambitious developer, or someone who just wants to get their feet wet in Rust – you are more than welcome!

A specific cry for help: I actually have zero C experience. :sweat_smile: I am porting this driver by reading the official HAILO-RT C-driver files and translating the logic into Rust – which involves a lot of communication, prompting, and headaches with AI! If there is anyone out there with C/Kernel experience who could act as a mentor or help translate the hardware-specific C logic (like memory mapping, BAR initialization, etc.), that would be incredible!

:rocket: Future Plans

This is still Zukunftsmusik (a dream for the future), but once the driver matures, the plan is to:

  • Set up a dedicated Discord server for contributors and users as early as i can.

  • Create a download page hosting pre-compiled, ready-to-load driver binaries for standard Raspberry Pi OS kernels, so users don’t have to compile custom Rust-kernels themselves and can directly download and load the drivers.

If you are interested in hacking on some bare-metal Rust or just want to follow the progress, check out the repository here:

:backhand_index_pointing_right: https://codeberg.org/AnnoDomine/hailort-driver-rust-port

Looking forward to your feedback and maybe seeing some of you in the commit history! :crab:

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Just a quick update on the port: The PCIe BARs (Config, VDMA, FW Access) are now safely pinned into the 64-bit virtual memory space using the kernel’s Devres API. No more translation faults!

Here is the proof from dmesg :slight_smile:
```text
[ 2793.298909] hailort_driver_rust: HAILO PCIe device found! Board Type: Hailo10H
[ 2793.298926] hailort_driver_rust: Enable device memory and bus mastering
[ 2793.298970] hailort_driver_rust: PCIe resources mapped
[ 2793.298974] hailort_driver_rust: Config BAR: 0xffffc000866f0000
[ 2793.298976] hailort_driver_rust: VDMA BAR: 0xffffc000866e8000
[ 2793.298979] hailort_driver_rust: FW Access BAR: 0xffffc000866d8000
[ 2793.298982] hailort_driver_rust: HAILO Hailo10H successfully initialized.
```

Next step: Tackling the Address Translation Registers (ATR) to get the dynamic memory windows working for the boot status.