When I look at datasheet PER[n/p]0 is located on pin 47,49
I interpret this as PER0_n is pin 47 and PER0_p is pin 49
However when I look at schematic for raspberry pi CM5 IO Board, pin 49 (PER0**_p**) is connected to pin 124 which according to data sheet (and symbol) is PCI_TX**_n**
Can someone please clarify which pin is n and which is p?
BR
// Per
Welcome to the Hailo Community!
The Hailo-8 modules follow the PCIe specification. The pins are as you interpreted them correctly.
Please note that the PCIe specification states allows automatic Lane polarity inversion to simplify PCB trace routing. See PCI Express M.2 Specification section PCI Express Interface. That may explain why the CM5 IO board is setup this way.
Thank you.
I suppose the IO Board uses the autoswap ability then.
I will change the connection on my board and hope it still works… 