Hi everyone, I am currently designing a hardware system integrating a Hailo-8 module with a Xilinx UltraScale+ . Could someone please clarify whether the Hailo-8 M.2/PCIe module supports SRIS (Separate Reference Independent SSC) or SRNS (Separate Reference Non-ISSC) mode, or if it strictly requires a Common Clock (CC) architecture? Any insights or technical documentation on this would be greatly appreciated. Thanks you so much.
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